Yeah I went into to Ptune3 and literally tweaked every setting 2 ways in each direction one at a time to see if they changed the nature of the corruption, but none of them did :-/

The good news is, the 'constraint' of not being able to clear with DMA has me working out a potential solution that requires a clear every 16 frames instead of every frame, so I may end up better off

I would really like to figure out if there is a way to use the DMA for general writes in the main RAM area though
Yatis reminded me today of another factor: DMA->RAM does not act the same when using P1 or P2 addresses. In my library I access through P2. I remember having tested using P1, hoping that CPU-bound functions would get faster because of the cache, but I encountered difficulties.

Have you checked which area your VRAM pointer accesses through, and whether the other region works better?
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